This invention relates to the field of synchronous oscillators. Such oscillators are used as building blocks in a wide variety of circuit applications, including (but not limited to) clock recovery, modulation, encoding, decoding, signal detectors and discriminators, and direct sequence, spread spectrum (DSSS) systems. It is also ideal for broadband communications, in AM to FM conversion, FM to digital conversion, etc.
The synchronous oscillator is well known, and is described, for example, in U.S. Pat. Nos. 4,274,067, 4,335,404 and 4,356,456 as well as in numerous papers published by the present inventor.
The basic building blocks for a synchronous oscillator are shown, for example, in FIG. 1, and consist of an amplifier 10, a high-Q tank circuit 12, and a positive feedback path 14 through a feedback capacitor 16, and a second feedback path 18.
The circuit uses regeneration to provide an output which is regeneratively linked to the input signal. By a combination of positive and negative feedback, the input signal sensitivity and the regeneration gain are inversely proportional to the input signal.
The synchronous oscillator has a natural resonant frequency at which oscillation occurs in the absence of an input signal. However, when an input signal is applied, the oscillator very quickly xe2x80x9ctunesxe2x80x9d to match the input signal. This occurs by regenerative gain of the input signal; when the amplitude of the regenerated signal exceeds the amplitude of the natural oscillations, then the natural oscillations are replaced by the regenerating signal, which is the input signal multiplied by the regeneration gain.
An example of a conventional synchronous oscillator circuit is illustrated at 20 in FIG. 2. An input transistor receives an input signal (Vi) at its base. The collector of the input transistor T1 is coupled to the emitter of an oscillator transistor T2. The input transistor T1 acts as an input buffer amplifier for the input signal, and injects the input signal into the oscillator transistor T2.
The collector of the oscillator transistor T2 is coupled to one end of an inductor L of a tank circuit 22. The tank circuit 22 comprises the inductor L coupled in parallel with series connected capacitors C2 and C3. The other end of the inductor L is coupled through a second inductor Lc to the positive supply rail Ve.
The synchronous oscillator also includes first and second feedback paths 24 and 26. The first feedback path 24 is provided by a feedback capacitor C1 coupled between the tank circuit 22 and the base of the oscillator transistor T2. This provides positive feedback from the tank circuit 22 to the input of the oscillator transistor T2, to provide regenerative feedback in the circuit. The second inductor Lc acts as a choke to provide a buffer for the power supply, and also forces the feedback though the feedback capacitor C1 to the base of the oscillator transistor T2. Feedback to the transistor is positive to enhance oscillations.
The second feedback path 26 is provided by a connection from the emitter of the oscillator transistor T2 to a node 28 between the series connected capacitors C2 and C3 of the tank circuit 22.
The transistors T1 and T2 are biased by respective resistors R1 and R2 coupled to the positive supply rail Ve.
The output from the circuit may be taken at any suitable point driven by the oscillator transistor T2. In the illustrated circuit the output is taken from the second feedback path 26, coupled by a D.C. blocking output capacitor Co.
The main regenerative feedback in the circuit is that provided by the first feedback path 24 through the feedback capacitor C1. However, this is believed not be continuous positive feedback, but instead occurs in samples or bursts (depicted schematically at 30), due to class xe2x80x9cCxe2x80x9d operation of the oscillator transistor T2.
Certain selected characteristics of the synchronous oscillator 20 are illustrated in FIGS. 3 and 4.
FIG. 3 shows the relation between the regenerative gain gm of the oscillator, and the Q of the tank circuit, with varying frequency. The maximum Q occurs at the resonant frequency xcfx890. However this also corresponds to the minimum amount of regenerative gain. As the Q decreases, the regenerative gain increases. The product of the two represents the overall gain of the circuit. Therefore, it can be seen that the gain has an extremely wide, and flat, characteristic, representing a linear response over a very broad bandwidth. Such a characteristic is highly advantageous in broadband communications.
In FIG. 3, the frequency response drops sharply at the edges of the bandwidth. This is a result of the signal becoming so small that it cannot compensate for losses in the tank circuit.
The output of the standard synchronous oscillator varies in phase from +90xc2x0 to xe2x88x9290xc2x0 with respect to the input, across the bandwidth of the oscillator. The zero phase difference occurs when the input signal corresponds to the resonant frequency xcfx890 (see FIG. 3).
To illustrate the high sensitivity and high noise rejection of the circuit, FIG. 4a depicts an input signal which is affected by noise, for discrimination. The input signal is represented by low amplitude input signal 32 which is barely distinguishable from surrounding noise 34. When fed as an input to the synchronous oscillator 20 of FIG. 2, the oscillations rapidly xe2x80x9ctunexe2x80x9d to the frequency of the input signal 32, to provide a strongly discriminated output 36, as shown in FIG. 4b. 
FIG. 5 illustrates a second example of a conventional circuit, in the form of a coherent phase synchronous oscillator circuit. This is similar to the circuit of FIG. 3, but a phase detector 38 is included to detect the phase difference between the input signal and the output signal. The output from the phase detector 38 is fed through an integrator 39 to provide a phase control input to the oscillator transistor T2 of the synchronous oscillator. In this way, the phase of the output signal can be made identical to that of the input signal to provide a coherent phase output (in contrast to the variable phase characteristic of the circuit shown in FIG. 3).
However, compared to other circuits, a synchronous oscillator can provide a wide bandwidth, a high input sensitivity and a high noise rejection, which seems not to be matched by other circuits. A good PLL may, for example, have a signal sensitivity of about xe2x88x9225 dBm and a signal to noise ratio sensitivity of +3 dBm. In contrast, a synchronous oscillator may provide a signal sensitivity of xe2x88x92100 dBm and an input signal to noise ratio sensitivity as low as xe2x88x9238 dB.
A further important characteristic of the synchronous oscillator is its energy efficiency. The regenerative feedback results in very little power dissipation, enabling the circuit to operate highly effectively with very low power supply requirements, for example, approximately 2-3 volts.
As explained above, in the conventional synchronous oscillator, the output xe2x80x9ctunesxe2x80x9d to the same frequency as the input signal.
It would be desirable to yet further improve the characteristics of a synchronous oscillator.
Broadly speaking, a first aspect of the present invention provides a synchronous oscillator comprising a feedback path which provides negative impedance conversion (NIC).
A second broad aspect of the invention relates to a synchronous oscillator with an additional feedback path from an output node of an amplifier to an input node. The additional feedback path may include or have one or more of the following:
(a) a resonant frequency at least ten times lower than that of a tank circuit of the oscillator;
(b) a resonant frequency at least ten times lower than a fundamental frequency of the oscillator;
(c) a capacitance (or a capacitance component) having a value at least ten times larger than a characteristic capacitance of the tank circuit;
(d) an inductance (or an inductive component) having a value at least ten times larger than a characteristic inductance of the tank circuit;
(e) a purely capacitive, non-inductive, complex impedance.
The combination of such a feedback path and the normal regenerative feedback may provide additional benefits. Advantages, features and objects of the invention include one or more of:
The bandwidth of the circuit may be increased;
The input sensitivity of the circuit may be increased;
The noise rejection sensitivity of the circuit may be improved;
The frequency stability of the circuit may be increased; and
The jitter rejection may be improved.
In addition to the effects listed above (wider bandwidth, better jitter and noise rejection and better frequency stabilisation), a further effect of NIC feedback may be to enable the frequency of oscillation to be increased. Instead of the output being the same frequency as the input, the output can be a harmonic of the input frequency, and the oscillator will synchronise to a harmonic of the input frequency or the fundamental frequency. The desired harmonic may be selected by the design of the circuit.
The invention may be better understood from the following description with reference to the accompanying drawings. In addition, further broad definitions of the invention and technical descriptions are provided in Annex A appended hereto and explicitly forming part of the content and description of this application.